spi: spi { compatible = "sstar_spi"; io_phy_addr = <0x1f000000>; banks = <0x1110>,<0x1111>,<0x1038>,<0x101E>,<0x100B>; clocks = <&CLK_mspi0>; interrupts = <GIC_SPI INT_IRQ_MSPI...
回答于 2021-06-18 11:39
spi: spi { compatible = "sstar_spi"; io_phy_addr = <0x1f000000>; banks = <0x1110>,<0x1111>,<0x1038>,<0x101E>,<0x100B>; clocks = <&CLK_mspi0>; interrupts = <GIC_SPI INT_IRQ_...
回答于 2021-06-09 11:41
每次修改配置保存一下配置 2D07 # cp .config arch/arm/configs/infinity2m_spinand_ssc011a_s01a_minigui_defconfig -F 2D06 # cp .config ./arch/arm/configs/infinity2m_spinand_ssc011a_s01a_minigui_doublenet_defconfig -f
回答于 2021-06-09 11:33
配置dts vi kernel/arch/arm/boot/dts/infinity2m-doublenet.dtsi ################################# # uart2: uart2@1F221400 { # compatible = "sstar,uart"; # reg = <0x1F221400 0x100>; # interrupts = <GIC_SPI INT_IRQ_UART_2 IRQ_TYPE_LEVEL_HIGH>;...
回答于 2021-05-27 10:26
修改DTS vi kernel/arch/arm/boot/dts/infinity2m-doublenet.dtsi 屏蔽带有PAD_UART1_RX的core-voltage 节点。 因为PAD_SAR_GPIO1有其他用途,所以需要开启。 我们只需要取消后边注释 (core-voltage节点,没有PAD_UART1_RX参数)。 参照如下修改 /* core_voltage { vid_width = &l...
回答于 2021-05-27 09:59